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- DIY ¿ëÇ°: Àü±â
- ºê·£µå À̸§: ATORCH
- ±Ù¿ø: CN (Á¤Ç°)
ST7789V Initialization code
ST7789V void Write_Spi_cmd(unsigned char data) { unsigned char i; Set_SPI_CS(0); udelay(200); Set_SPI_CLK(0); Set_SPI_SDI(0); Set_SPI_CLK(1); for(i=0;i<8;i++) { Set_SPI_CLK(0); udelay(200); if(data & 0x80) Set_SPI_SDI(1); else Set_SPI_SDI(0); Set_SPI_CLK(1); udelay(200); data<<=1; } Set_SPI_CS(1); udelay(200); } void Write_Spi_date(unsigned char data) { unsigned char i; Set_SPI_CS(0); Set_SPI_CLK(0); Set_SPI_SDI(1); Set_SPI_CLK(1); for(i=0;i<8;i++) { Set_SPI_CLK(0); udelay(200); if(data & 0x80) Set_SPI_SDI(1); else Set_SPI_SDI(0); Set_SPI_CLK(1); udelay(200); data<<=1; } Set_SPI_CS(1); udelay(200); } void lcd_ext_mod_init(void) { Write_3Spi_cmd(0xCF); Write_3Spi_date (0x00); Write_3Spi_date (0xC1); Write_3Spi_date (0X30); Write_3Spi_cmd(0xED); Write_3Spi_date (0x64); Write_3Spi_date (0x03); Write_3Spi_date (0X12); Write_3Spi_date (0X81); Write_3Spi_cmd(0xE8); Write_3Spi_date (0x85); Write_3Spi_date (0x10); Write_3Spi_date (0x7A); Write_3Spi_cmd(0xCB); Write_3Spi_date (0x39); Write_3Spi_date (0x2C); Write_3Spi_date (0x00); Write_3Spi_date (0x34); Write_3Spi_date (0x02); Write_3Spi_cmd(0xF7); Write_3Spi_date (0x20); Write_3Spi_cmd(0xEA); Write_3Spi_date (0x00); Write_3Spi_date (0x00); Write_3Spi_cmd(0xB1); Write_3Spi_date (0x00); Write_3Spi_date (0x1A); Write_3Spi_cmd(0xB6); Write_3Spi_date (0x0A); Write_3Spi_date (0xA2); Write_3Spi_cmd(0xC0); Write_3Spi_date (0x1B); Write_3Spi_cmd(0xC1); Write_3Spi_date (0x01); Write_3Spi_cmd(0xC5); Write_3Spi_date (0x30); Write_3Spi_date (0x30); Write_3Spi_cmd(0xC7); Write_3Spi_date (0XB7); Write_3Spi_cmd(0x36); Write_3Spi_date (0xC8); Write_3Spi_cmd(0xF2); Write_3Spi_date (0x00); Write_3Spi_cmd(0x26); Write_3Spi_date (0x01); Write_3Spi_cmd(0xE0); Write_3Spi_date (0x0F); Write_3Spi_date (0x2A); Write_3Spi_date (0x28); Write_3Spi_date (0x08); Write_3Spi_date (0x0E); Write_3Spi_date (0x08); Write_3Spi_date (0x54); Write_3Spi_date (0XA9); Write_3Spi_date (0x43); Write_3Spi_date (0x0A); Write_3Spi_date (0x0F); Write_3Spi_date (0x00); Write_3Spi_date (0x00); Write_3Spi_date (0x00); Write_3Spi_date (0x00); Write_3Spi_cmd(0XE1); Write_3Spi_date (0x00); Write_3Spi_date (0x15); Write_3Spi_date (0x17); Write_3Spi_date (0x07); Write_3Spi_date (0x11); Write_3Spi_date (0x06); Write_3Spi_date (0x2B); Write_3Spi_date (0x56); Write_3Spi_date (0x3C); Write_3Spi_date (0x05); Write_3Spi_date (0x10); Write_3Spi_date (0x0F); Write_3Spi_date (0x3F); Write_3Spi_date (0x3F); Write_3Spi_date (0x0F); Write_3Spi_cmd(0x3a); Write_3Spi_date (0x66); mdelay(20); Write_3Spi_cmd(0xb0); //RGB interface signal control , DE SYNC MODE , Polarity of HSYNC VSYNC DOTCLK DEN , display path via memory or not Write_3Spi_date (0xCC);//DEN high enable , dotclk rising edge, HSYNC & VSYNC low level clock . mdelay(20); Write_3Spi_cmd(0xF6);//Endian setting , RGB/MPU interface select Write_3Spi_date (0x00); Write_3Spi_date (0x30); Write_3Spi_date (0x06); Write_3Spi_cmd(0x11); //Exit Sleep mdelay(12); Write_3Spi_cmd(0x29); //Display on Write_3Spi_cmd(0x2c); //Memory Write
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